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Silvaco offers a full IC-CAD design flow including design capture, circuit simulation, layout design, physical verification, parasitic extraction and reduction, and post-layout analysis including statistical variation, and yield analysis. Silvaco SmartSpice Pro 2024 v5.9.2 Linux64 Tested Picture Schematic Editor Gateway is a highly productive environment with intuitive editing, capacity to support large and complex hierarchical or flat designs, ability to automatically generate symbols from existing legacy netlists and support for industry standard netlist and interface formats. It features tight integrations to Silvaco TCAD and analog custom design tools. Layout Editor Expert is a hierarchical IC layout editor featuring high capacity and flexible use across many silicon technologies in analog, mixed-signal, RF and digital circuits. As a key part of Silvaco’s custom IC...

TCAD software solutions are key to developing new semiconductor processes and devices, dramatically reducing costs and time to market.The package includes Victory TCAD,Legacy + Interconnect and Utmost IV. Silvaco DeckBuild 2024 v5.2.29 Linux64 Tested Picture Reduce Development Costs Reduce the time and manufacturing cycles spent to develop semiconductor technologies ITRS roadmaps indicates that TCAD simulation can reduce the costs during development cycles by ~30% Silvaco Tonyplot 2024 v3.10 Linux64 Tested Picture Visualize Internal Physical Processes Using simulation, you can see ‘inside” the device. Experimental measurements tell you what happens, but not why it happens. TCAD can tell you why. For example: Reverse voltage characterization on a power device tells you what happens at high reverse biases. The device experiences reverse breakdown at a specific voltage A TCAD...

With always more pressure on reducing the time to deliver new products, designers need to be efficient when exectuing simulation tasks. The most precious time is the one you spend to enter and post-process models, but solving times are also important. Conscious of this, the Altair Flux team is providing in the 2024 version new capabilities and automations in the SimLab environment allowing to reduce pre-processing efforts. Many improvements are also brought to reduce the time you need to get your results. Altair Flux 2024.0 Linux64 Tesed Picture TIME GAINS IN MODEL SET-UP Meshing plays an essential role in getting good results and providing the best solver performance. This is key when you want to evaluate eddy currents in solid...

Feko is used globally across multiple industries including aerospace, defense, automotive, communications and consumer electronics to reduce the time-to-market. Feko customers achieve improved connectivity and functionality through robust simulation driven product design and deployment strategies. Altair FEKO 2024.0 Linux64 Tested Picture Feko addresses the broadest set of high-frequency electromagnetic simulation applications allowing teams to optimize wireless connectivity, including 5G, ensure electromagnetic compatibility (EMC), and perform radar cross section (RCS) and scattering analysis. From antenna simulation and placement, radio coverage, network planning, and spectrum management, to electromagnetic compatibility (EMC/EMI), radome modeling, bio-electromagnetics and RF devices, Feko combines with other Altair tools to optimize system performance through machine learning and reduce modeling time for complex systems. Antenna Design Feko is used to...

Sentaurus is a suite of TCAD tools which simulates the fabrication,operation and reliability of semiconductor devices. The Sentaurus simulators use physical models to represent the wafer fabrication steps and device operation, thereby allowing the exploration and optimization of new semiconductor devices. The Sentaurus TCAD tools work seamlessly and can be combined into complete simulation flows in 2-D and 3-D.Sentaurus TCAD supports silicon and compound semiconductor technologies, covering a broad range of semiconductor applications. Synopsys Sentaurus TCAD 2024.03 Linux Tested Picture Key Applications: CMOS, FinFET Memory (DRAM, NVM) Power Devices (Si, SiC, GaN) RF Devices (GaAs, InP, GaN) Optoelectronics (CIS, Solar Cells,Photodetectors) BEoL Reliability Value of Sentaurus TCAD in Technology Development and Optimization Semiconductor manufacturers face the challenge of developing process...

The Synopsys Custom Compiler™ design environment is a modern solution for full-custom analog, custom digital, and mixed-signal IC design. As the heart of the Synopsys Custom Design Family Custom Compiler provides design entry, simulation management and analysis, and custom layout editing features. It delivers industry-leading productivity, performance, and ease-of-use while remaining easy to adopt for users of legacy tools. Synopsys Custom Compiler 2023.12-SP1 Linux64 Tested Picture The Custom Compiler design environment includes features for mixed-signal design entry, design debug, simulation management, analysis, and reporting. For layout, Custom Compiler provides fast and user-friendly polygon editing features and boosts productivity with its pioneering visually-assisted automation flow. Visually assisted automation is an innovative approach that delivers 2-10X better layout productivity—especially for difficult FinFET-based...

Sentaurus Process Explorer is a fast 3D process emulator used to identify and correct process integration issues during technology development. Synopsys Sentaurus Process Explorer 2024.03 Linux64 Tested Picture Sentaurus Process Explorer produces highly realistic 3D representations of process structures using GDSII mask data and a process recipe as input. Sentaurus Process Explorer is linked to the Synopsys TCAD simulators, such as Raphael FX, to enable the high accuracy RC extraction in Design Technology Co-Optimization (DTCO) applications.

The Questa advanced simulator is the core simulation and debug engine of the Questa verification solution; the comprehensive advanced verification platform capable of reducing the risk of validating complex FPGA and SoC designs. Siemens Questa Advanced Simulator 2024.1 Linux Tested Picture The QuestaSim verification solution delivers on these requirements for complex SoC designs. QuestaSim achieves industry-leading performance and capacity through aggressive, global compile and simulation optimization algorithms for SystemVerilog, VHDL, and SystemC. Meanwhile, its Questa Visualizer debug environment provides high-performance, high-capacity debugging for dramatic regression throughput improvements when running large test suites. QuestaSim Benefits Industry-leading high performance multi-language simulator High-performance, high-capacity unified debug Reference simulator for LRM compatibility UVM, SystemVerilog, VHDL, SystemC, and mixed language support Native compiled, single kernel...