27 Articles
Tags :Synopsys Page 3
The Synopsys Custom Compiler™ design environment is a modern solution for full-custom analog, custom digital, and mixed-signal IC design. As the heart of the Synopsys Custom Design Family Custom Compiler provides design entry, simulation management and analysis, and custom layout editing features. It delivers industry-leading productivity, performance, and ease-of-use while remaining easy to adopt for users of legacy tools. Synopsys Custom Compiler 2023.12-SP1 Linux64 Tested Picture The Custom Compiler design environment includes features for mixed-signal design entry, design debug, simulation management, analysis, and reporting. For layout, Custom Compiler provides fast and user-friendly polygon editing features and boosts productivity with its pioneering visually-assisted automation flow. Visually assisted automation is an innovative approach that delivers 2-10X better layout productivity—especially for difficult FinFET-based...
Synopsys S-Metro provides a comprehensive and powerful toolbox for automated assessment of numerical and image-based metrology data for photomask qualification, modeling data preparation, and process characterization. Process engineers use it to measure the lithographic performance, for instance through process window analysis. Synopsys S-Metro 2024.06 Win/Linux64 Tested Picture Metrology images from any source, whether photomask or wafer, can be processed and analyzed in Synopsys S-Metro as well. Images are aligned to the corresponding layout and can be averaged to improve contrast; contours are extracted for use in model calibration and validation as well as for training machine learning modes. Synopsys S-Metro automatically processes SEM image and CD data in a consistent and transparent manner. The infrastructure is capable of handling tens...
S-Litho represents advanced lithography simulation for semiconductor device manufacturing process development and optimization. It covers a wide range of applications in proximity printing, optical, immersion, extreme ultraviolet (EUV), and electron beam (e-beam) lithography. Process-limiting effects within the imaging system of an exposure tool can be thoroughly analyzed, taking the impact of mask and substrate topography on photoresist patterning into account. Interfacing S-Litho with Synopsys TCAD tools allows a seamless modeling of complex integration techniques such as double-patterning. The link between S-Litho and Synopsys Proteus mask synthesis applications accelerates the generation and validation of optical proximity correction (OPC) models and improves process robustness. Synopsys S-Litho 2024.06 Win/Linux64 Tested Picture S-Litho provides a comprehensive set of features to predict the outcome of...
The Tweaker solution is the first and only complete ECO Platform with flexible flow control and integrated GUI, which handles all challenging capacity and complexity issues within ECO framework in a single machine. Everything is incremental As an ECO tool, Tweaker optimizes a design incrementally and locally, with minimal impact to the existing performance. In all of the ECO fixing operations, Tweaker only focuses on only critical portions of a design, known as the “ECO Domain”. For this reason, Tweaker can handle large designs in a very short turn-around time. Tweaker ECO covers all sign-off scenarios Timing/power optimization tools require MMMC (Multi-Mode, Multi-Corner) support as a basic ECO feature. Tweaker’s ECO-specific architecture takes the MMMC feature further by focusing only on the “ECO...
Sentaurus Process Explorer is a fast 3D process emulator used to identify and correct process integration issues during technology development. Synopsys Sentaurus Process Explorer 2024.03 Linux64 Tested Picture Sentaurus Process Explorer produces highly realistic 3D representations of process structures using GDSII mask data and a process recipe as input. Sentaurus Process Explorer is linked to the Synopsys TCAD simulators, such as Raphael FX, to enable the high accuracy RC extraction in Design Technology Co-Optimization (DTCO) applications.
Synopsys RTL Architect product represents the industry’s first physically-aware RTL analysis, exploration, and optimization system with signoff technology integration. Synopsys RTL Architect uses a fast, multi-dimensional implementation prediction engine that enables RTL designers to predict the power, performance, area, and congestion impact of their RTL changes. Built on a unified data model, Synopsys RTL Architect directly leverages Synopsys world-class implementation and golden signoff solutions, including Synopsys PrimePower RTL, to deliver results that are accurate early in the design cycle. Synopsys RTL Architect enables designers to significantly reduce RTL development time and to achieve “Simply Better RTL.” Key Benefits Increase Productivity Reduce project schedule with faster runtimes and fewer frontend – backend iterations Predict PPA Fast, implementation prediction engine ensures the...
Raphae FX is the gold standard, 2D and 3D resistance, capacitance and inductance extraction tool for optimizing on-chip parasitic for multi-level interconnect structures in small cells. As a reference field solver, Raphael FX provides the most accurate parasitic models in the industry. Trusted by major foundries, interconnect parasitics generated by Raphael FX are included as part of their design reference guides. Synopsys Raphael FX 2024.03 Linux64 Tested Picture Benefits Analyze complex on-chip interconnect structures and the influence of process variation Create a parasitic database for both foundries and designers to study the effect of design rule change Generate accurate capacitance rules for layout parameter extraction tools Interface with Sentaurus Structure Editor to create and analyze arbitrary and complex 3D shapes...
