Tag:Synopsys

Proteus ProGen models are empirical compact models reflecting the performance of a lithography process. Model parameters are determined by fitting experimental data. The Proteus Modeling Platform (PMP) provides a single environment for calibrating those parameters with a high degree of automation and tuning them for optimum performance in downstream applications. Synopsys ProGen 2023.12 Linux64 Tested Picture ProGen, Proteus’ highly customizable solution calibrates a single model that is utilized by both the space- and frequency-domain engines.

Synopsys Proteus™ full-chip mask synthesis smart manufacturing solutions enabling technologies down to 3nm and below. With the Synopsys Proteus family you can achieve exceptional precision, efficiency and speed in proximity correction, model building for correction, and analyzing proximity effects on corrected and uncorrected IC layout patterns, revolutionizing your chip fabrication process. The Synopsys Proteus full-chip mask synthesis family are the products of choice for leading edge IDMs and foundries and have been production proven for two decades with support for the latest EUV lithography processes. Synopsys Proteus 2023.12 Linux64 Tested Picture Key Benefits Largest Lithography Entitlement Industries first and most deployed inverse lithography solution with native curvilinear design and mask support. Fast Turn Around Time AI driven solutions with advanced...

Proteus WorkBench (PWB) is a powerful cockpit tool for the development and optimization of Proteus-based mask synthesis solutions. It is based on a powerful hierarchical GDSII/OASIS layout visualization and editing engine, providing a comprehensive environment for lithography simulation, compact model building, optical proximity correction (OPC) recipe tuning, litho rule checks, and mask synthesis flow development. Synopsys Proteus WorkBench 2023.12 Linux64 Tested Picture PWB offers an easy to use platform with access to a wide-ranging set of tools, enabling fast calibration of accurate models, supporting the optimization of highly efficient Proteus recipes for deployment in OPC and verification. As state-of-the-art lithography exposure tools are operated at their physical resolution limit, new mask and process technologies are being deployed to further shrink...

Design Compiler® RTL synthesis solution enables users to meet today’s design challenges with concurrent optimization of timing, area, power and test. Design Compiler includes innovative topographical technology that enables a predictable flow resulting in faster time to results. Topographical technology provides timing and area prediction within 10% of the results seen post-layout enabling designers to reduce costly iterations between synthesis and physical implementation. Design Compiler also includes a scalable infrastructure that delivers 2X faster runtime on quad-core platforms. Design Compiler is the core of Synopsys’ comprehensive RTL synthesis solution, including Power Compiler™, DesignWare®, PrimeTime®, and DFTMAX™. Design Compiler NXT is also available and includes includes best-in-class quality-of-results, congestion prediction and alleviation capabilities, physical viewer, and floorplan exploration. Additionally Design Compiler NXT...

PrimeSim HSPICE simulator is seamlessly integrated with and empowered by other simulation engines in the continuum. PrimeSim HSPICE is the industry’s ‘gold standard’ for accurate circuit simulation and offers foundries-certified MOS device models with state-of-the-art simulation and analysis algorithms. With extensive usage in chip/package/board/backplane signal integrity simulation, cell and memory characterization, and analog mixed signal IC design, PrimeSim HSPICE is the industry’s most popular, trusted and comprehensive circuit simulator. To push the productivity frontier even further, PrimeSim HSPICE is fully integrated with the next generation design environment—PrimeWave, and ready to be used on the Cloud,where user could easily run, save and restore their simulations, anywhere and anytime. Synopsys PrimeSim HSPICE 2024.09 Win/Linux Tested Picture Foundries-Certified Models Device models are the...

Sentaurus is a suite of TCAD tools which simulates the fabrication,operation and reliability of semiconductor devices. The Sentaurus simulators use physical models to represent the wafer fabrication steps and device operation, thereby allowing the exploration and optimization of new semiconductor devices. The Sentaurus TCAD tools work seamlessly and can be combined into complete simulation flows in 2-D and 3-D.Sentaurus TCAD supports silicon and compound semiconductor technologies, covering a broad range of semiconductor applications. Synopsys Sentaurus TCAD 2024.03 Linux Tested Picture Key Applications: CMOS, FinFET Memory (DRAM, NVM) Power Devices (Si, SiC, GaN) RF Devices (GaAs, InP, GaN) Optoelectronics (CIS, Solar Cells,Photodetectors) BEoL Reliability Value of Sentaurus TCAD in Technology Development and Optimization Semiconductor manufacturers face the challenge of developing process...

Synopsys 3DIC Compiler, a unified exploration-to-signoff platform, delivers the highest levels of design efficiency for capacity and performance. It leverages a common data-model to integrate design, die-to-die routing, native system analysis, verification, and signoff in a single environment. Synopsys 3DSO.ai, industry’s first autonomous AI optimization solution for 2.5D and 3D heterogeneous design and integration, seamlessly integrates with 3DIC Compiler to maximize system performance and quality of results at a rapid pace for thermal integrity, signal integrity, and power network design. Ensuring system technology co-optimization (STCO), Synopsys 3DIC Compiler is certified by all foundries and leveraged successfully by customers in dozens of designs. Key Benefits Unmatched Scalability System-of-chips integration over hundreds of billions of transistors High Productivity Fast exploration and design...

Custom WaveView™ ADV provides a complete transistorlevel analysis and debugging environment for pre-processing and post-processing SPICE and FastSPICE simulations. Custom WaveView ADV is integrated with Synopsys’ HSPICE®, FineSim® and CustomSim™ to streamline the debugging and analysis process for SPICE and FastSPICE simulation and increase design productivity. The combination of Custom WaveView ADV with Synopsys circuit simulators provides design teams with a high-performance,productive simulation debug and analysis environment for complex SoC design. Synopsys Custom WaveView ADV 2024.09 Win/Linux64 Tested Picture Custom WaveView ADV is a netlist-based debugging environment for SPICE and FastSPICE simulators such as HSPICE, FineSim and CustomSim. Custom WaveView ADV is also tightly integrated with Custom WaveView, enabling waveform cross-probing. Together, these tools aid designers in rapidly performing customized...

The Synopsys Custom Compiler™ design environment is a modern solution for full-custom analog, custom digital, and mixed-signal IC design. As the heart of the Synopsys Custom Design Family Custom Compiler provides design entry, simulation management and analysis, and custom layout editing features. It delivers industry-leading productivity, performance, and ease-of-use while remaining easy to adopt for users of legacy tools. Synopsys Custom Compiler 2023.12-SP1 Linux64 Tested Picture The Custom Compiler design environment includes features for mixed-signal design entry, design debug, simulation management, analysis, and reporting. For layout, Custom Compiler provides fast and user-friendly polygon editing features and boosts productivity with its pioneering visually-assisted automation flow. Visually assisted automation is an innovative approach that delivers 2-10X better layout productivity—especially for difficult FinFET-based...

The RSoft Photonic Device Tools provide the most comprehensive set of rigorous optical solvers to design photonic devices and systems. The latest release, version 2024.09, expands the platform’s capabilities for automated metalens design as well as multi-physics simulations for optoelectronic devices and illumination systems. The RSoft Photonic Device Tools 2024.09 release includes many new features to improve usability and speed for improved photonic device/grating simulation: Support for GPU-based FDTD simulation in FullWAVE FDTD Supports NVIDIA GPU hardware Significant speedup, exact speedup is hardware/problem dependent Non-orthogonal unit cells in DiffractMOD RCWA More efficient simulation of hexagonal lattice structures RSoft BSDF files produced with this new feature can be fully used by the RSoft BSDF UDOP in LightTools and MetaOptic Designer Support...