Tags :Siemens Page 2

Aprisa is a detail-route-centric physical design solution for the modern SoC. Whether your goal is to speed time to tapeout, reduce total cost of ownership, or achieve the lowest power usage, Aprisa is here with patented technologies and best-in-class support to ensure your success. Aprisa offers complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Its detail-route-centric architecture and hierarchical database enable fast design closure and optimal quality of results (QoR) at a competitive runtime. Siemens Aprisa 2023.1 Linux Tested Picture Reduced time-to-design closure A unified data model brings real route information and parasitics to any engine and step in the flow. Designers can confidently know their design’s achievable PPA at pre-route stage, greatly reducing...

Solido Design Environment is a comprehensive AI-powered design environment for all SPICE-level design and verification, and is a single unified solution for nominal and variation analysis. Used by thousands of designers to produce the most competitive products in hp computing, AI, IoT, automotive and mobile applications. Brute force-accurate signoff variation 1000X faster Orders of magnitude faster than brute-force simulation Full coverage verification across PVTs and Monte Carlo Brute-force Monte Carlo and SPICE accurate high-sigma verification Variation-aware design sensitivity, debugging and optimization Comprehensive design environment to boost engineering efficiency Significantly reduces documentation time/effort Identifies design weaknesses previously undetectable Easy to use and deploy Intuitive GUI for interactive design and analysis GUI or batch mode Works with all process technologies Integrated with...