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Electrical & Power Engineering softwares.
RTLvision PRO simplifies the visualization of large RTL designs, including third party IP and reused blocks. Using Concept’s award winning visualization technology, the tool provides the unique and effective graphical rendering of RTL code structures, allowing engineers to quickly appreciate design functionality. Supporting SystemVerilog, VHDL and Verilog, RTLvision PRO comes complete with a range of debug views such as a powerful waveform display, an interactive cone of influence window, and other displays for a complete, 360° picture of the device. Altair RTLvision PRO 2024.0 Win Tested Picture Mixed-HDL IP comprehension using Concept’s unique, leading RTL visualization approach, makes complex SoC functionality crystal clear Advanced debug options, including waveform signal analysis, interactive logic cone and other specialized views, allow efficient bug eradication...
StarVision PRO represents the state-of-the-art in debug solutions for advanced electronic SoCs. The incorporation of Concept’s leading visualization and detection technology enables rapid cause-effect analysis for efficient functional analysis. This advanced and unique mixed-mode debug platform seamlessly combines SPICE and transistor analysis from our market leading SpiceVision PRO tool with digital RTL and gates from our advanced RTLvision PRO tool. It is fully customizable and incorporates many advanced features not available in other debug solutions, to handle the most complex of SoC platforms. Altair StarVision PRO 2024.1 Win Tested Picture Powerful general-purpose debugger for rapid cause-effect resolution Effective mixed-mode, RTL, Gate, SPICE and post-layout level debug Customizable tool platform with specialized SoC & IP capabilities
With always more pressure on reducing the time to deliver new products, designers need to be efficient when exectuing simulation tasks. The most precious time is the one you spend to enter and post-process models, but solving times are also important. Conscious of this, the Altair Flux team is providing in the 2024 version new capabilities and automations in the SimLab environment allowing to reduce pre-processing efforts. Many improvements are also brought to reduce the time you need to get your results. Altair Flux 2024.0 Linux64 Tesed Picture TIME GAINS IN MODEL SET-UP Meshing plays an essential role in getting good results and providing the best solver performance. This is key when you want to evaluate eddy currents in solid...
Feko is used globally across multiple industries including aerospace, defense, automotive, communications and consumer electronics to reduce the time-to-market. Feko customers achieve improved connectivity and functionality through robust simulation driven product design and deployment strategies. Altair FEKO 2024.0 Linux64 Tested Picture Feko addresses the broadest set of high-frequency electromagnetic simulation applications allowing teams to optimize wireless connectivity, including 5G, ensure electromagnetic compatibility (EMC), and perform radar cross section (RCS) and scattering analysis. From antenna simulation and placement, radio coverage, network planning, and spectrum management, to electromagnetic compatibility (EMC/EMI), radome modeling, bio-electromagnetics and RF devices, Feko combines with other Altair tools to optimize system performance through machine learning and reduce modeling time for complex systems. Antenna Design Feko is used to...
Design Compiler® RTL synthesis solution enables users to meet today’s design challenges with concurrent optimization of timing, area, power and test. Design Compiler includes innovative topographical technology that enables a predictable flow resulting in faster time to results. Topographical technology provides timing and area prediction within 10% of the results seen post-layout enabling designers to reduce costly iterations between synthesis and physical implementation. Design Compiler also includes a scalable infrastructure that delivers 2X faster runtime on quad-core platforms. Design Compiler is the core of Synopsys’ comprehensive RTL synthesis solution, including Power Compiler™, DesignWare®, PrimeTime®, and DFTMAX™. Design Compiler NXT is also available and includes includes best-in-class quality-of-results, congestion prediction and alleviation capabilities, physical viewer, and floorplan exploration. Additionally Design Compiler NXT...
PrimeSim HSPICE simulator is seamlessly integrated with and empowered by other simulation engines in the continuum. PrimeSim HSPICE is the industry’s ‘gold standard’ for accurate circuit simulation and offers foundries-certified MOS device models with state-of-the-art simulation and analysis algorithms. With extensive usage in chip/package/board/backplane signal integrity simulation, cell and memory characterization, and analog mixed signal IC design, PrimeSim HSPICE is the industry’s most popular, trusted and comprehensive circuit simulator. To push the productivity frontier even further, PrimeSim HSPICE is fully integrated with the next generation design environment—PrimeWave, and ready to be used on the Cloud,where user could easily run, save and restore their simulations, anywhere and anytime. Synopsys PrimeSim HSPICE 2024.09 Win/Linux Tested Picture Foundries-Certified Models Device models are the...
Sentaurus is a suite of TCAD tools which simulates the fabrication,operation and reliability of semiconductor devices. The Sentaurus simulators use physical models to represent the wafer fabrication steps and device operation, thereby allowing the exploration and optimization of new semiconductor devices. The Sentaurus TCAD tools work seamlessly and can be combined into complete simulation flows in 2-D and 3-D.Sentaurus TCAD supports silicon and compound semiconductor technologies, covering a broad range of semiconductor applications. Synopsys Sentaurus TCAD 2024.03 Linux Tested Picture Key Applications: CMOS, FinFET Memory (DRAM, NVM) Power Devices (Si, SiC, GaN) RF Devices (GaAs, InP, GaN) Optoelectronics (CIS, Solar Cells,Photodetectors) BEoL Reliability Value of Sentaurus TCAD in Technology Development and Optimization Semiconductor manufacturers face the challenge of developing process...
Synopsys 3DIC Compiler, a unified exploration-to-signoff platform, delivers the highest levels of design efficiency for capacity and performance. It leverages a common data-model to integrate design, die-to-die routing, native system analysis, verification, and signoff in a single environment. Synopsys 3DSO.ai, industry’s first autonomous AI optimization solution for 2.5D and 3D heterogeneous design and integration, seamlessly integrates with 3DIC Compiler to maximize system performance and quality of results at a rapid pace for thermal integrity, signal integrity, and power network design. Ensuring system technology co-optimization (STCO), Synopsys 3DIC Compiler is certified by all foundries and leveraged successfully by customers in dozens of designs. Key Benefits Unmatched Scalability System-of-chips integration over hundreds of billions of transistors High Productivity Fast exploration and design...
Custom WaveView™ ADV provides a complete transistorlevel analysis and debugging environment for pre-processing and post-processing SPICE and FastSPICE simulations. Custom WaveView ADV is integrated with Synopsys’ HSPICE®, FineSim® and CustomSim™ to streamline the debugging and analysis process for SPICE and FastSPICE simulation and increase design productivity. The combination of Custom WaveView ADV with Synopsys circuit simulators provides design teams with a high-performance,productive simulation debug and analysis environment for complex SoC design. Synopsys Custom WaveView ADV 2024.09 Win/Linux64 Tested Picture Custom WaveView ADV is a netlist-based debugging environment for SPICE and FastSPICE simulators such as HSPICE, FineSim and CustomSim. Custom WaveView ADV is also tightly integrated with Custom WaveView, enabling waveform cross-probing. Together, these tools aid designers in rapidly performing customized...
The Synopsys Custom Compiler™ design environment is a modern solution for full-custom analog, custom digital, and mixed-signal IC design. As the heart of the Synopsys Custom Design Family Custom Compiler provides design entry, simulation management and analysis, and custom layout editing features. It delivers industry-leading productivity, performance, and ease-of-use while remaining easy to adopt for users of legacy tools. Synopsys Custom Compiler 2023.12-SP1 Linux64 Tested Picture The Custom Compiler design environment includes features for mixed-signal design entry, design debug, simulation management, analysis, and reporting. For layout, Custom Compiler provides fast and user-friendly polygon editing features and boosts productivity with its pioneering visually-assisted automation flow. Visually assisted automation is an innovative approach that delivers 2-10X better layout productivity—especially for difficult FinFET-based...
