Tag:2023 Page 2

The Tweaker solution is the first and only complete ECO Platform with flexible flow control and integrated GUI, which handles all challenging capacity and complexity issues within ECO framework in a single machine. Everything is incremental As an ECO tool, Tweaker optimizes a design incrementally and locally, with minimal impact to the existing performance. In all of the ECO fixing operations, Tweaker only focuses on only critical portions of a design, known as the “ECO Domain”. For this reason, Tweaker can handle large designs in a very short turn-around time. Tweaker ECO covers all sign-off scenarios Timing/power optimization tools require MMMC (Multi-Mode, Multi-Corner) support as a basic ECO feature. Tweaker’s ECO-specific architecture takes the MMMC feature further by focusing only on the “ECO...

Petra is a cost-effective software solution for managing, manipulating and visualizing integrated geological, geophysical and engineering data. Geologists, engineers, technicians and analysts use Petra for exploration, exploitation, infill drilling, reserves analysis, unconventional plays, production analysis and more. With Petra, you can quickly visualize results using mapping, cross-sections, seismic interpretations, log plots, cross-plots, production and reservoir analysis, and 3D visualization. To maximize your subscription, S&P Global offers technical support as well as Petra training courses at select locations and on site, by request. IHS Petra v3.17.3 Tested Picture Key features of the Mapping Module include: Integrate surface land picture into your subsurface interpretations Post digital/raster log curves and production data to well location Create and customize contour and bubble maps Display...

The Professional edition of The Geochemist’s Workbench 2023 is the complete suite of tools to meet every practicing geochemist’s needs. GWB Pro is your choice for computing phase diagrams and modeling reactive transport. One-dimensional and two-dimensional simulations of reactive transport in single and dual-porosity media, including bioreaction, stable isotopes, and migrating colloids, are a snap. Then animate your results and create video clips with a few clicks. Geochemist’s WorkBench(GWB) Professional 2023 v17.0.3 Tested Picture GWB Pro’s advanced algorithms and multithreaded design make it ideal for simulating the fate and transport of contaminants in flowing ground and surface water. In addition to reactive transport, GWB Pro models kinetic and equilibrium reaction in multicomponent systems, calculates Eh-pH and activity diagrams, and creates a spectrum of specialty plots. You can balance reactions, calculate equilibrium constants,...

Synopsys RTL Architect product represents the industry’s first physically-aware RTL analysis, exploration, and optimization system with signoff technology integration. Synopsys RTL Architect uses a fast, multi-dimensional implementation prediction engine that enables RTL designers to predict the power, performance, area, and congestion impact of their RTL changes. Built on a unified data model, Synopsys RTL Architect directly leverages Synopsys world-class implementation and golden signoff solutions, including Synopsys PrimePower RTL, to deliver results that are accurate early in the design cycle. Synopsys RTL Architect enables designers to significantly reduce RTL development time and to achieve “Simply Better RTL.” Key Benefits Increase Productivity Reduce project schedule with faster runtimes and fewer frontend – backend iterations Predict PPA Fast, implementation prediction engine ensures the...

MSC Actran 2023.1/2024.1 MSC Adams 2023.1/2024.1 MSC Adams Modeler 2023.1/2024.1 MSC Apex 2023.1/2024.1 MSC CAEfatigue 2024.1 MSC CradleCFD 2023.1/2024.1 MSC CoSim 2023.1/2024.1 MSC Digimat 2023.1/2024.1 MSC Dytran 2022.2/2024.1 MSC Easy5 2023.1/2024.1 MSC Elements 2023.1/2024.1 MSC Marc 2023.1/2024.1 MSC MaterialCenter 2023.1/2024.1 MSC Nastran 2023.2/2024.1 MSC Patran 2023.1/2024.1 MSC SimManager 2023.1/2024.1 MSC Simufact Additive 2023.2/2024.2 MSC Simufact Forming 2023.2/2024.2 MSC Simufact Welding 2023.2/2024.2

PICS3D, Photonic Integrated Circuit Simulator in 3D, is a state of the art 3D-simulator for surface and edge emission laser diodes, SOA, and other similar active waveguide devices. The 2D/3D semiconductor equations (drift-diffusion, Poisson, etc..) are coupled to the optical modes in both lateral and longitudinal directions. Optical properties such as quantum well/wire/dot optical gain and spontaneous emission rates are computed self-consistently. Crosslight PICS3D (LASTIP) 2023 Tested Picture Starting from the 2016 version, the functionality of our 2D laser solver (LASTIP) has also been folded into PICS3D: this allows for easy simulation of laser devices without significant longitudinal effects and more flexibility for customers working on a variety of laser device designs. Click here for details. Applications 2D and 3D...

APSYS, Advanced Physical Models of Semiconductor Devices, is based on 2D/3D finite element analysis of electrical, optical and thermal properties of compound semiconductor devices, with silicon as a special case. Emphasis has been placed on band structure engineering and quantum mechanical effects. Inclusion of various optical modules also makes this simulation package attractive for applications involving photosensitive or light emitting devices. Crosslight APSYS 2023 Tested Picture  Applications Diodes, transistors and various other types of silicon devices LEDs and OLEDs Solar cells Photodetectors (PD) High electron mobility transistors (HEMT) Heterojunction bipolar transistors (HBT) Resonant tunneling diodes (RTD) Quantum well infrared photodetectors (QWIP) Small MOS devices with strong quantum mechanical effects (Quantum-MOS) Power devices Features Restart from previous saved status Industry leading...

Cadence Common Patcher with License Generater Tool for 2023-2024 Cadence Assura Physical Verification: Update_ASSURA04.16.001-618 (2.95GB) Cadence AWR Design Environment v24.1:Base_AWR24.10.000 (1.41GB) Cadence Digital Design Implementation (DDI) System 23.10.000(46.53GB) Cadence EMX Planar 3D Solver 2023.1 Linux64 Cadence Integrated Circuit (Advanced Node Virtuoso): ICADVM 20.10.280(11.53GB) Cadence Extraction Tools (Quantus QRC): Base_QUANTUS23.11.000 (3.25GB) Cadence Encounter Conformal: Base_CONFRML22.10.100 (2.84GB) Cadence Genus Synthesis Solution: Base_GENUS23.10.300 (1.52GB) Cadence Helium Virtual and Hybrid Studio:Base_HELIUM22.04.000 (4.08GB) Cadence Indago Debug Platform: Base_INDAGO22.03.00 (2.17GB) Cadence Incisive vManager: Base_VMANAGER23.09.002 (1.87GB) Cadence Innovus Implementation System: Base_INNOVUS21.10.000 (11.16GB) Cadence Integrated Circuit (Virtuoso): Hotfix_IC06.18.250 (15.50GB) Cadence IXCOM:Base_IXCOM22.04.000 (1.51GB) Cadence JasperGold Apps: Base_JASPER24.03.000 (1.15GB) Cadence JED AI 23.10.000 (5.98GB) Cadence Joules RTL Power Analysis: Base_JLS21.10.000 (2.11GB) Cadence Manufacturability and Variability Sign-Off: MVS15.20.000 Cadence Metric-Driven Verification:...

Riviera-PRO addresses verification needs of engineers crafting tomorrow’s cutting-edge FPGA and SoC devices. Riviera-PRO enables the ultimate testbench productivity, reusability, and automation by combining the high-performance simulation engine, advanced debugging capabilities at different levels of abstraction, and support for the latest Language and Verification Library Standards. Top Features and Benefits High Performance Simulation Extensive simulation optimization algorithms to achieve the highest performance in VHDL, Verilog/SystemVerilog, SystemC, and mixed-language simulations The industry-leading capacity and simulation performance enable high regression throughput for developing the most complex systems Support for the latest Verification Libraries, including Universal Verification Methodology (UVM) Support for VHDL verification libraries, including OSVVM and UVVM. Advanced Debugging Integrated multi-language debug environment enables automating time-consuming design analysis tasks and fixing bugs...

ALINT-PRO is a design verification solution for RTL code written in VHDL, Verilog, and SystemVerilog, which is focused on verifying coding style and naming conventions, RTL and post-synthesis simulation mismatches, smooth and optimal synthesis, correct FSM descriptions, avoiding problems on further design stages, clocks and reset tree issues, CDC, RDC, DFT, and coding for portability and reuse. The solution performs static analysis based on RTL and SDC™ source files uncovering critical design issues early in the design cycle, which in turn reduces design signoff time dramatically. Running ALINT-PRO before the RTL simulation and logic synthesis phases prevents design issues spreading into the downstream stages of design flow and reduces the number of iterations required to finish the design. Single Framework...