PrimeSim HSPICE simulator is seamlessly integrated with and empowered by other simulation engines in the continuum. PrimeSim HSPICE is the industry’s ‘gold standard’ for accurate circuit simulation and offers foundries-certified MOS device models with state-of-the-art simulation and analysis algorithms. With extensive usage in chip/package/board/backplane signal integrity simulation, cell and memory characterization, and analog mixed signal IC design, PrimeSim HSPICE is the industry’s most popular, trusted and comprehensive circuit simulator.
To push the productivity frontier even further, PrimeSim HSPICE is fully integrated with the next generation design environment—PrimeWave, and ready to be used on the Cloud,where user could easily run, save and restore their simulations, anywhere and anytime.
Synopsys PrimeSim HSPICE 2024.09 Win/Linux Tested Picture
Foundries-Certified Models
Device models are the ingredients for accurate circuit simulation. HSPICE is consistently first to provide new advanced device models and HSPICE models are first to be foundries-certified. Over the years, HSPICE has consistently engineered leadingedge modeling technology for advanced node CMOS, FinFET and FDSOI processes that ensures the most advanced and accurate set of industry-standard device-model implementations. Synopsys collaboratesclosely with leading commercial and proprietary foundries to ensure that their HSPICE model parameters are timely and accurately validated to their fabrication process. The comprehensive set of HSPICE models have been extensively proven over the broadest set of semiconductor technologies, ranging from the Compact Modeling Council (CMC) standardized models (BSIM, PSP, HiSIM, etc.) on the latest technology nodes to proprietary models (HVMOS, TFT, etc.) for specialized applications (high voltage, display, etc.).
Chip/Package/Board/Backplane Signal Integrity (SI) Simulation
As chip and board speeds continue to increase, new design and verification challenges emerge. PrimeSim HSPICE reveals signal integrity problems caused by jitter, crosstalk, ringing, ground bounce, and other noise sources. With extensive model and element support, PrimeSim HSPICE is the idea simulator that can satisfy your silicon-to-package-to-board-to-backplane SI simulation needs.
Transient, Linear and Statistical Analysis
PrimeSim HSPICE offers transient, linear and statistical analyses in one environment where users can easily analyze different what-if scenarios.
Output data and waveforms are further explored in PrimeWave where technology specific compliance and measurements are available.
Statistical Eye Diagram Analysis (with IBIS AMI)
With PrimeSim HSPICE’s cutting edge StatEye analysis, designers can accurately simulate ultra-low bit error rate in a single simulation and display bathtub plots in what used to require a million transient simulations to attain the same coverage. PrimeSim HSPICE StatEye is widely used in single ended parallel bus designs such as DDR as well as differential signaling such as PCIe and USB designs. For accurate modeling of complex equalization systems for SerDes and DDR, PrimeSim HSPICE’s StatEye supports the Algorithm Modeling Interface (AMI), part of the IBIS 7.0 specification. User can run StatEye with any of existing HSPICE netlist, and then quickly capture eye diagram, covert to BER (Bit Error Rate), catch worst pattern and do eye unfolding to visualize equalizer adaptation.
ISO-26262 TCL-1 ASIL D Certified
PrimeSim HSPICE tool can be used in the development of safety-related elements according to ISO 26262, with allocated safety requirements up to a maximum Automotive Safety Integrity Level D (ASIL D), if the tool is used in the context of a tool chain and in compliance of the PrimeSim HSPICE Functional Safety Manual.
