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Electrical & Power Engineering softwares.
Custom WaveView™ ADV provides a complete transistorlevel analysis and debugging environment for pre-processing and post-processing SPICE and FastSPICE simulations. Custom WaveView ADV is integrated with Synopsys’ HSPICE®, FineSim® and CustomSim™ to streamline the debugging and analysis process for SPICE and FastSPICE simulation and increase design productivity. The combination of Custom WaveView ADV with Synopsys circuit simulators provides design teams with a high-performance,productive simulation debug and analysis environment for complex SoC design. Synopsys Custom WaveView ADV 2024.09 Win/Linux64 Tested Picture Custom WaveView ADV is a netlist-based debugging environment for SPICE and FastSPICE simulators such as HSPICE, FineSim and CustomSim. Custom WaveView ADV is also tightly integrated with Custom WaveView, enabling waveform cross-probing. Together, these tools aid designers in rapidly performing customized...
Tessent Silicon Lifecycle Management solutions include advanced debug, safety & security features and in-life data analytics to meet the evolving challenges of today’s silicon lifecycle. Ensure the highest test quality, accelerate yield ramp and improve safety, security and reliability across the silicon lifecycle using best-in-class solutions for design-for-test (DFT), debug and in-life monitoring plus powerful data analytics. Tessent Advanced DFT Address the challenges of in-system test for today’s complex SoCs and chiplets with market-leading logic and memory test products that combine capabilities in a powerful test flow to ensure total chip coverage. Tessent Embedded Analytics Close productivity gaps using actionable insights from embedded analytics that shorten total development time, accelerate debug and reduce risk and cost to ensure timely market...
IC Validator WorkBench (ICVWB) is a powerful, high-performance, hierarchical layout visualization and analysis tool. It allows quick viewing and editing GDSII, OASIS®, and LEF/DEF layouts from small IP blocks to full-chip databases. In addition, ICVWB enables you to easily visualize and access the layout data being examined by the IC Validator (ICV) physical verification tool suite and review physical verification results. Building from the earlier IC WorkBench Edit/View Plus (ICWBEV) product, ICVWB refines the application for physical verification designers. Synopsys IC Validator Workbench 2023.09 Linux64 Tested Picture Benefits Quickly opens large GDSII, OASIS, and LEF/DEF files with low memory overhead. Additionally, cache files can drastically decrease the time for subsequent sessions Opens Optimized OASIS files instantly Provides easy debugging of...
SmartCtrl is thrilled to announce the arrival of its latest version – SmartCtrl 2024.1! Packed with new features. Discover a more intuitive and efficient control system that sets new standards in control technology. PSC SmartCtrl 2024.1 Tested Picture New AC-DC converter topology: Three-Phase PFC Boost Converter. Two different control structures are fully supported: 🔺 Alpha-Beta control 🔺 DQ control Two main filter types can be selected: 🔺 L Filter 🔺 LCL Filter In the case of the LCL Filter, active damping or passive damping can be chosen. Proportional-Resonant compensator can be tuned for alpha-beta control structure. The control loop of two different Phase-Locked Loop (PLL) can be tuned: 🔺 Synchronous Reference Frame PLL (SRFPLL) 🔺 Quadrature Signal Generator – Synchronous Reference Frame PLL (QSG-SRFPLL) Four widely used EMI...
PrimeSim HSPICE is the industry’s ‘gold standard’ for accurate circuit simulation and offers foundry-certified MOS device models with state-of-the-art simulation and analysis algorithms. With extensive usage in chip/package/board/backplane signal integrity simulation, cell and memory characterization, and analog mixed signal IC design, PrimeSim HSPICE is the industry’s most popular, trusted and comprehensive circuit simulator. Available versions: 2025.x , 2024.x ,… Synopsys PrimeSim HSPICE 2025.6 Win64 Tested Picture PrimeSim™ SPICE is a high-performance SPICE circuit simulator for analog, RF, and mixed-signal applications. PrimeSim SPICE offers a unique multi-core/multi-machine scaling and heterogeneous compute acceleration on GPU/CPU delivering faster runtime with sign-off accuracy. PrimeSim SPICE supports high-frequency noise analysis, efficient S-Parameter handling while offering advanced analysis capabilities for periodic and non-periodic time-domain and frequency-domain...
Aprisa is a detail-route-centric physical design solution for the modern SoC. Whether your goal is to speed time to tapeout, reduce total cost of ownership, or achieve the lowest power usage, Aprisa is here with patented technologies and best-in-class support to ensure your success. Aprisa offers complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Its detail-route-centric architecture and hierarchical database enable fast design closure and optimal quality of results (QoR) at a competitive runtime. Siemens Aprisa 2023.1 Linux Tested Picture Reduced time-to-design closure A unified data model brings real route information and parasitics to any engine and step in the flow. Designers can confidently know their design’s achievable PPA at pre-route stage, greatly reducing...
SEMCAD X Matterhorn V20.2 offers new features and major enhancements that further strengthen our customers’ in silico tool set for research, device design and optimization, and compliance evaluation. The highlights of SEMCAD X Matterhorn V20.2 in a nutshell: Python scripting: discover the power, flexibility, and comfort of SEMCAD X’s integration with JupyterLab together with the upgrade to Python V3.8 Dosimetry/compliance: SEMCAD X is compliant with the latest and forthcoming IEEE/IEC mmWave APD and SAR standards Reduced storage: results from full-wave simulations can now be automatically compressed, either on-the-fly or for already computed simulation results – resulting in massive file size savings (up to 20x) Productivity tools: explore a whole set of powerful new modelling tools and a streamlined graphical user interface (GUI) for an...
Solido Design Environment is a comprehensive AI-powered design environment for all SPICE-level design and verification, and is a single unified solution for nominal and variation analysis. Used by thousands of designers to produce the most competitive products in hp computing, AI, IoT, automotive and mobile applications. Brute force-accurate signoff variation 1000X faster Orders of magnitude faster than brute-force simulation Full coverage verification across PVTs and Monte Carlo Brute-force Monte Carlo and SPICE accurate high-sigma verification Variation-aware design sensitivity, debugging and optimization Comprehensive design environment to boost engineering efficiency Significantly reduces documentation time/effort Identifies design weaknesses previously undetectable Easy to use and deploy Intuitive GUI for interactive design and analysis GUI or batch mode Works with all process technologies Integrated with...
Precision offers vendor-independent FPGA synthesis. It provides best-in-class performance and area, high-reliability design capabilities and tight links to simulation and formal equivalency checking. Siemens offers three unique FPGA synthesis solutions – Precision Hi-Rel, Precision RTL Plus and Precision RTL. Precision’s products are tightly integrated with Siemens’ FormalPro LEC for equivalency checking and HDL Designer for design capture and design verification using ModelSim/Questa. Precision RTL Precision RTL, Siemens entry-level FPGA synthesis product, offers best-in-class quality of results with a vendor-independent FPGA synthesis solution. Precision RTL Plus Precision RTL Plus, adds DO-254 certification utilities for mil-aero applications, on-chip debug and validation and resource optimization for DSPs and RAMs. Precision Hi-Rel Precision Hi-Rel, enhances Precision RTL Plus with automated mitigation of SEUs/SETs in...
Solido Characterization Suite is a suite of AI-powered library characterization tools delivering quick solutions with uncompromised accuracy. Streamline characterization flows through robust verification, IP selection guidance, and significantly reduces runtime while ensuring production-accurate models and statistical data. Key Features Solido Characterization Suite Solido Characterization suite works with any existing characterization solution for standard cells, IOs, memories and custom cells and supports all .lib data types, including timing, power, noise and variation, and supports all .lib data structures such as NLDM, CCS, LVF, and Moments. Solido Analytics Comprehensive .lib verification in hours instead of weeks Finds issues undetectable by traditional checks Supports hundreds of standard checks and custom checks Compares all library metrics and summarizes information for the user Supports custom...
